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The Multiphase Shared Arrays (MSA) library provides a specialized shared memory abstraction in Charm++ that provides automatic memory management. Explicitly shared memory provides the convenience of shared memory programming while exposing the performance issues to programmers and the "intelligent" Adaptive Runtime System (aRTS). Each MSA is accessed in one specific mode during each phase of execution: read-only mode, in which any thread can read any element of the array; write-once mode, in which each element of the array is written to (possibly multiple times) by at most one worker thread, and no reads are allowed and accumulate mode, in which any threads can add values to any array element, and no reads or writes are permitted. A sync call is used to denote the end of a phase. We permit multiple copies of a page of data on different processors
and provide automatic fetching and caching of remote data. For
example, initially an array might be put in write-once mode while it
is populated from a file. This determines the cache behavior and the
permitted operations on the array during this phase. write-once means
every thread can write to a different element of the array. The user
is responsible for ensuring that two threads do not write to the same
element; the system helps by detecting violations. From the cache
maintenance viewpoint, each page of the data can be over-written on
it's owning processor without worrying about transferring ownership or
maintaining coherence. At the sync, the data is simply
merged. Subsequently, the array may be read-only for a while,
thereafter data might be accumulate'd into it, followed by it
returning to read-only mode. In the accumulate phase, each local copy
of the page on each processor could have its accumulations tracked
independently without maintaining page coherence, and the results
combined at the end of the phase. The accumulate operations also
include set-theoretic union operations, i.e. appending items to a set
of objects would also be a valid accumulate operation. User-level or
compiler-inserted explicit prefetch calls can be used to improve
performance.
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