Center for Petascale Computing
A simple model for managing the access right vector is one where the array can be in only one of
the following states at a given time: Shared (all partitions can be accessed by all threads), Exclusive
(each element of the array is accessed and updated by at most one thread) or Accumulate-Op (all
partitions can be updated via Op accumulate operations). The state of the array is changed by
a collective operation. Although simple, this mechanism covers a significantly large class of CSE
applications. It has been implemented as a library in the Charm++ system, and is in use in
multiple applications.
While this implementation has demonstrated the usefulness of the design, compiler support
is needed in order to achieve good performance via strip-mining and prefetches, and in order to
support a simple notation where a global access has the same syntax as a local access.
Investigator: